Chopping in Continuous-Time Sigma-Delta Modulators

Hui Jiang; Burak Gönen; Kofi A.A. Makinwa; Stoyan Nihtianov

doi:10.1109/iscas.2017.8050951

Chopping in Continuous-Time Sigma-Delta Modulators

Hui Jiang
, Burak Gönen
, Kofi A.A. Makinwa
, Stoyan Nihtianov

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

Abstract

This paper discusses the use of chopping in continuous-time sigma-delta modulators where 1/f noise and offset need to be suppressed by continuous-time methods. An intuitive analysis of the artifacts related to chopping is presented. Aliasing of quantization noise is found to be the main problem, especially for chopping frequencies lower than the modulator's sampling frequency (fs). Correctly timed return-to-zero and switched-capacitor DACs are proposed as a solution to the aliasing problem. In both cases, the key idea is to synchronize DAC transitions with moments when the quantization noise at the input of the first integrator is low. Circuit level simulations are presented to validate the proposed techniques.

Original language	English
Title of host publication	Conference Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 2017
Place of Publication	Piscataway, NJ
Publisher	IEEE
Pages	1-4
Number of pages	4
ISBN (Electronic)	978-1-4673-6853-7
ISBN (Print)	978-1-4673-6852-0
DOIs	https://doi.org/10.1109/iscas.2017.8050951
Publication status	Published - 2017
Event	ISCAS 2017 - IEEE International Symposium on Circuits and Systems: From Dreams to Innovation - Baltimore, MD, United States Duration: 28 May 2017 → 31 May 2017 Conference number: 50 http://iscas2017.org/

Conference

Conference	ISCAS 2017 - IEEE International Symposium on Circuits and Systems
Abbreviated title	ISCAS
Country/Territory	United States
City	Baltimore, MD
Period	28/05/17 → 31/05/17
Internet address	http://iscas2017.org/

Keywords

chopping
chopping artifacts
continuous time
sigma delta
precision ADC
1/f noise
offset

Access to Document

10.1109/iscas.2017.8050951

1 Dissertation (TU Delft)

Capacitively-Coupled Bridge Readout Circuits
Jiang, H., 19 Nov 2019, 131 p.
Research output: Thesis › Dissertation (TU Delft)

Open Access
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Cite this

@inproceedings{a8260a7a72ed4715be02f0f29de95938,

title = "Chopping in Continuous-Time Sigma-Delta Modulators",

abstract = "This paper discusses the use of chopping in continuous-time sigma-delta modulators where 1/f noise and offset need to be suppressed by continuous-time methods. An intuitive analysis of the artifacts related to chopping is presented. Aliasing of quantization noise is found to be the main problem, especially for chopping frequencies lower than the modulator's sampling frequency (fs). Correctly timed return-to-zero and switched-capacitor DACs are proposed as a solution to the aliasing problem. In both cases, the key idea is to synchronize DAC transitions with moments when the quantization noise at the input of the first integrator is low. Circuit level simulations are presented to validate the proposed techniques.",

keywords = "chopping, chopping artifacts, continuous time, sigma delta, precision ADC, 1/f noise, offset ",

author = "Hui Jiang and Burak G{\"o}nen and Makinwa, \{Kofi A.A.\} and Stoyan Nihtianov",

year = "2017",

doi = "10.1109/iscas.2017.8050951",

language = "English",

isbn = "978-1-4673-6852-0",

pages = "1--4",

booktitle = "Conference Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 2017",

publisher = "IEEE",

address = "United States",

note = "ISCAS 2017 - IEEE International Symposium on Circuits and Systems : From Dreams to Innovation, ISCAS ; Conference date: 28-05-2017 Through 31-05-2017",

url = "http://iscas2017.org/",

}

Jiang, H, Gönen, B, Makinwa, KAA & Nihtianov, S 2017, Chopping in Continuous-Time Sigma-Delta Modulators. in Conference Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 2017. IEEE, Piscataway, NJ, pp. 1-4, ISCAS 2017 - IEEE International Symposium on Circuits and Systems, Baltimore, MD, United States, 28/05/17. https://doi.org/10.1109/iscas.2017.8050951

TY - GEN

T1 - Chopping in Continuous-Time Sigma-Delta Modulators

AU - Jiang, Hui

AU - Gönen, Burak

AU - Makinwa, Kofi A.A.

AU - Nihtianov, Stoyan

N1 - Conference code: 50

PY - 2017

Y1 - 2017

N2 - This paper discusses the use of chopping in continuous-time sigma-delta modulators where 1/f noise and offset need to be suppressed by continuous-time methods. An intuitive analysis of the artifacts related to chopping is presented. Aliasing of quantization noise is found to be the main problem, especially for chopping frequencies lower than the modulator's sampling frequency (fs). Correctly timed return-to-zero and switched-capacitor DACs are proposed as a solution to the aliasing problem. In both cases, the key idea is to synchronize DAC transitions with moments when the quantization noise at the input of the first integrator is low. Circuit level simulations are presented to validate the proposed techniques.

AB - This paper discusses the use of chopping in continuous-time sigma-delta modulators where 1/f noise and offset need to be suppressed by continuous-time methods. An intuitive analysis of the artifacts related to chopping is presented. Aliasing of quantization noise is found to be the main problem, especially for chopping frequencies lower than the modulator's sampling frequency (fs). Correctly timed return-to-zero and switched-capacitor DACs are proposed as a solution to the aliasing problem. In both cases, the key idea is to synchronize DAC transitions with moments when the quantization noise at the input of the first integrator is low. Circuit level simulations are presented to validate the proposed techniques.

KW - chopping

KW - chopping artifacts

KW - continuous time

KW - sigma delta

KW - precision ADC

KW - 1/f noise

KW - offset

U2 - 10.1109/iscas.2017.8050951

DO - 10.1109/iscas.2017.8050951

M3 - Conference contribution

SN - 978-1-4673-6852-0

SP - 1

EP - 4

BT - Conference Proceedings - IEEE International Symposium on Circuits and Systems, ISCAS 2017

PB - IEEE

CY - Piscataway, NJ

T2 - ISCAS 2017 - IEEE International Symposium on Circuits and Systems

Y2 - 28 May 2017 through 31 May 2017

ER -

Chopping in Continuous-Time Sigma-Delta Modulators

Abstract

Conference

Keywords

Access to Document

Fingerprint

Research output

Capacitively-Coupled Bridge Readout Circuits

Cite this