Inductive powering is an efficient method to wire-lessly transfer power to an implant. On the transmitter side, a power amplifier (class-D or class-E) is used to convert DC power, from a supply unit, into AC power, which can be transferred across the inductive link. At frequencies conventionally used for powering implants, the efficiency of a Class-D power amplifier is highly dependent on the dead time between the switching of the low-side and the high-side switches. Closed-loop techniques can then be adopted to automatically set the appropriate dead time. This paper addresses this issue by presenting the conceptual design of an analog CMOS closed-loop automatic efficiency optimization circuit for class-D PAs, consisting of an analog power meter and a 13-bit programmable delay line. The circuits have been designed in a 0.18μm CMOS technology and simulated using Cadence Spectre.