Compact Pixel Architecture for CMOS Lateral Flow Immunoassay Readout Systems

Evdokia Pilavaki, Virgilio Valente, Wouter Serdijn, Andreas Demosthenous

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

2 Citations (Scopus)


A novel pixel architecture for CMOS image sensors is presented. It uses only one amplifier for both integration of the photocurrent and in-pixel noise cancelation, thus minimizing power consumption. The circuit is specifically designed to be used in readout systems for lateral flow immunoassays. In addition a switching technique is introduced enabling the use of column correlated double sampling technique in capacitive transimpedance amplifier pixel architectures without the use of any memory cells. As a result the reset noise which is crucial in these architectures can be suppressed. The circuit has been designed in a 0.35-μm CMOS technology and simulations are presented to show its performance.
Original languageEnglish
Title of host publicationConference Proceedings - 13th Conference on PHD Research in Microelectronics and Electronics, PRIME 2017
Place of PublicationPiscataway, NJ
Number of pages4
ISBN (Electronic)978-1-5090-6508-0
Publication statusPublished - 2017
EventPRIME 2017: 13th Conference on PhD Research in Microelectronics and Electronics - Giardini Naxos - Taormina, Italy
Duration: 12 Jun 201715 Jun 2017
Conference number: 13


ConferencePRIME 2017
CityGiardini Naxos - Taormina
Internet address


  • Capacitive transimpedance amplifier
  • CMOS image sensors
  • correleted double sampling


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