TY - GEN
T1 - Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process
AU - Ilik, Sadik
AU - Şahin Solmaz, Nergiz
AU - Kabaoǧlu, Aykut
AU - Yelten, Mustafa Berke
PY - 2019
Y1 - 2019
N2 - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.
AB - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.
KW - ELT
KW - process variation
KW - radiation gamma rays
KW - TID
UR - http://www.scopus.com/inward/record.url?scp=85071544716&partnerID=8YFLogxK
U2 - 10.1109/SMACD.2019.8795230
DO - 10.1109/SMACD.2019.8795230
M3 - Conference contribution
AN - SCOPUS:85071544716
T3 - SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
SP - 21
EP - 24
BT - SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
PB - IEEE
T2 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019
Y2 - 15 July 2019 through 18 July 2019
ER -