Convolutional neural networks on dataflow engines

Nils Voss, Marco Bacis, Oskar Mencer, Georgi Gaydadjiev, Wayne Luk

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

5 Citations (Scopus)

Abstract

In this paper we discuss a high performance implementation for Convolutional Neural Networks (CNNs) inference on the latest generation of Dataflow Engines (DFEs). We discuss the architectural choices made during the design phase taking into account the DFE chip properties. We then perform design space exploration, considering the memory bandwidth and resources utilisation constraints derived from the used DFE and the chosen architecture. Finally, we discuss the high performance implementation and compare the obtained performance against other implementations, showing that our proposed design reaches 2,450 GOPS when running VGG16 as a test case.

Original languageEnglish
Title of host publicationProceedings - 35th IEEE International Conference on Computer Design, ICCD 2017
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages435-438
Number of pages4
ISBN (Electronic)9781538622544
DOIs
Publication statusPublished - 22 Nov 2017
Externally publishedYes
Event35th IEEE International Conference on Computer Design, ICCD 2017 - Boston, United States
Duration: 5 Nov 20178 Nov 2017

Conference

Conference35th IEEE International Conference on Computer Design, ICCD 2017
CountryUnited States
CityBoston
Period5/11/178/11/17

Keywords

  • CNN
  • Deep Learning
  • DFE
  • DSE
  • FPGA
  • Inference

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