A European Roadmap to Leverage RISC-V in Space Applications

Gianluca Furano; S. Di Mascio; A. Menicucci; Claudio Monteleone

doi:10.1109/AERO53065.2022.9843361

A European Roadmap to Leverage RISC-V in Space Applications

Gianluca Furano, S. Di Mascio, A. Menicucci, Claudio Monteleone

Space Systems Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

5 Citations (Scopus)

126 Downloads (Pure)

Abstract

RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.

Original language	English
Title of host publication	2022 IEEE Aerospace Conference, AERO 2022
Number of pages	7
DOIs	https://doi.org/10.1109/AERO53065.2022.9843361
Publication status	Published - 2022
Event	2022 IEEE Aerospace Conference (AERO) - Big Sky, United States Duration: 5 Mar 2022 → 12 Mar 2022

Publication series

Name	IEEE Aerospace Conference Proceedings
Volume	2022-March
ISSN (Print)	1095-323X

Conference

Conference	2022 IEEE Aerospace Conference (AERO)
Country/Territory	United States
City	Big Sky
Period	5/03/22 → 12/03/22

Bibliographical note

Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

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10.1109/AERO53065.2022.9843361

A_European_Roadmap_to_Leverage_RISC_V_in_Space_ApplicationsFinal published version, 649 KB

Cite this

@inproceedings{da696f45278c46678aea0ff5129724ef,

title = "A European Roadmap to Leverage RISC-V in Space Applications",

abstract = "RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.",

author = "Gianluca Furano and {Di Mascio}, S. and A. Menicucci and Claudio Monteleone",

note = "Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public. ; 2022 IEEE Aerospace Conference (AERO) ; Conference date: 05-03-2022 Through 12-03-2022",

year = "2022",

doi = "10.1109/AERO53065.2022.9843361",

language = "English",

isbn = "978-1-6654-3760-8",

series = "IEEE Aerospace Conference Proceedings",

booktitle = "2022 IEEE Aerospace Conference, AERO 2022",

}

TY - GEN

T1 - A European Roadmap to Leverage RISC-V in Space Applications

AU - Furano, Gianluca

AU - Di Mascio, S.

AU - Menicucci, A.

AU - Monteleone, Claudio

N1 - Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2022

Y1 - 2022

N2 - RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.

AB - RISC-V is an open and modular Instruction Set Architecture(ISA) which is rapidly growing in popularity in terrestrial applications. This paper presents the place in future space embedded systems ESA's roadmap for RISC-V based processors. In order to satisfy different applications with contrasting requirements in satellite data systems, four different types of processors are identified: 1) General-Purpose (GP) processors for payloads 2) main platform On-Board Computers (OBCs) controllers 3) low-area/low-power microcontrollers (uCs), 4) enhanced payload processors with support for Artificial Intelligence (AI). We also describe the state of the art of the RISC-V software ecosystem, including the currently available hardware platforms, with a focus on developments for space applications and what has already been done in the European Space Industry. Finally, planned activities are presented, with a focus on the role of the European ecosystem.

UR - http://www.scopus.com/inward/record.url?scp=85137577903&partnerID=8YFLogxK

U2 - 10.1109/AERO53065.2022.9843361

DO - 10.1109/AERO53065.2022.9843361

M3 - Conference contribution

SN - 978-1-6654-3760-8

T3 - IEEE Aerospace Conference Proceedings

BT - 2022 IEEE Aerospace Conference, AERO 2022

T2 - 2022 IEEE Aerospace Conference (AERO)

Y2 - 5 March 2022 through 12 March 2022

ER -

A European Roadmap to Leverage RISC-V in Space Applications

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Bibliographical note

UN SDGs

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