Data Background-Based Test Development for All Interconnect and Contact Defects in RRAMs

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Resistive Random Access Memory (RRAM) is a potential technology to replace conventional memories by providing low power consumption and high-density storage. As various manufacturing vendors make significant efforts to push it to high-volume production and commercialization, high-quality and efficient test solutions are of great importance. This paper analyzes interconnect and contact defects in RRAMs, while considering the impact of the memory Data Background (DB), and proposes test solutions. The complete interconnect and contact defect space in a layout-independent RRAM design is defined. Exhaustive defect injection and circuit simulation are performed in a systematic manner to derive appropriate fault models, not only for single-cell and two-cell coupling faults, but also for multi-cell coupling faults where the DBs are important. The results show the existence of unique 3-cell and 4-cell coupling faults due to e.g., the sneak path in the array induced by defects. These unique faults cannot be detected with traditional RRAM test solutions. Therefore, the paper introduces a test generation method that takes into account the DB, which is able to efficiently detect all these faults; hence, further improving the fault/defect coverage in RRAMs.
Original languageEnglish
Title of host publicationProceedings of the 2023 IEEE European Test Symposium (ETS)
Number of pages6
ISBN (Electronic)979-8-3503-3634-4
ISBN (Print)979-8-3503-3635-1
Publication statusPublished - 2023
Event2023 IEEE European Test Symposium (ETS) - Venezia, Italy
Duration: 22 May 202326 May 2023

Publication series

NameProceedings of the European Test Workshop
ISSN (Print)1530-1877
ISSN (Electronic)1558-1780


Conference2023 IEEE European Test Symposium (ETS)

Bibliographical note

Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.


  • RRAM
  • interconnect and contact defects
  • data background
  • fault models
  • test development


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