Designing for 1st and 2nd Level Reliability of Micro-Electronic Packages using Combined Experimental - Numerical Techniques

RBR van Silfhout, MY Jansen, WD van Driel, GQ Zhang

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review


This paper presents our effort to predict IC, packaging, and board level reliability problems. Micro-electronic based reliability problems are driven by the mismatch between the different material properties, such as thermal expansion, hygro-swelling, and/or the degradation of interfacial strength. In the past, such reliability problems were treated separately, but recent developments have made clear that total product reliability concerns the interaction of IC, package, and PCB. This paper presents parts of our strategy to assess this integrated reliability by combining experimental and numerical techniques.
Original languageUndefined/Unknown
Title of host publicationProceedings 56th Electronic Components & Technology Conference 2006
Editors sn
Place of PublicationSan Diego, CA, USA
PublisherIEEE Society
Number of pages7
ISBN (Print)1-4244-0152-6
Publication statusPublished - 2006
Event56th Electronic Components & Technology Conference 2006 - San Diego, CA, USA
Duration: 30 May 20062 Jun 2006

Publication series



Conference56th Electronic Components & Technology Conference 2006


  • conference contrib. refereed
  • Conf.proc. > 3 pag

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