Detailed derivation and minimization of the equivalent parasitic capacitances of a high-voltage multiplier based on the complete model

J Wang, SWH de Haan, JA Ferreira

Research output: Contribution to journal › Article › Scientific › peer-review

Original language	English
Pages (from-to)	362-372
Number of pages	11
Journal	IEEE Transactions on Industry Applications
Volume	51
Issue number	1
DOIs	https://doi.org/10.1109/TIA.2014.2330060
Publication status	Published - 2015

Harvest
Date of publication 10-6-2014

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