This paper introduces a new test approach: device-aware test (DAT) for emerging memory technologies such as MRAM, RRAM, and PCM. The DAT approach enables accurate models of device defects to obtain realistic fault models, which are used to develop high-quality and optimized test solutions. This is demonstrated by an application of DAT to pinhole defects in STT-MRAMs and forming defects in RRAMs.
|Title of host publication||2020 IEEE European Test Symposium (ETS)|
|Publisher||Institute of Electrical and Electronics Engineers (IEEE)|
|Number of pages||2|
|Publication status||Published - 2020|
|Event||ETS 2020: 2020 IEEE European Test Symposium - Tallinn, Estonia|
Duration: 25 May 2020 → 29 May 2020
|Period||25/05/20 → 29/05/20|