Device-Aware Test for Ion Depletion Defects in RRAMs

Hanzhi  Xun; Sicong Yuan; Moritz Fieback; Mottaqiallah  Taouil; Said Hamdioui; Hassen Aziza

doi:10.1109/ITC51656.2023.00041

Device-Aware Test for Ion Depletion Defects in RRAMs

Hanzhi Xun, Sicong Yuan, Moritz Fieback, Mottaqiallah Taouil, Said Hamdioui, Hassen Aziza

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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Abstract

Many companies are heavily investing in the commercialization of Resistive Random Access Memories (RRAMs). This calls for a comprehensive understanding of manufacturing defects to develop efficient and high-quality test and diagnosis solutions to push high-volume production. This paper identifies and characterizes a new defect based on silicon measurements; the defect is called Ion Depletion (ID). In our case study, 45% cycles suffered from an intermittent reduction in high resistance state and did not impact low resistance state. The paper shows that the traditional fault modeling based on linear resistors as a defect model is not accurate. To address this challenge, the Device-Aware (DA) defect modeling method is applied; an RRAM model of the defective device is developed and calibrated using measurements to accurately describe the impact of the defect on the electrical behavior of the memory device. Afterward, fault analysis is performed based on the DA defect model, and appropriate fault models are introduced; they show that the ID defect may sensitize undefined state faults. Finally, dedicated test and diagnosis solutions for the ID defect are proposed.

Original language	English
Title of host publication	Proceedings of the 2023 IEEE International Test Conference (ITC)
Editors	Cristina Ceballos
Place of Publication	Piscataway
Publisher	IEEE
Pages	246-255
Number of pages	10
ISBN (Electronic)	979-8-3503-4325-0
ISBN (Print)	979-8-3503-4359-5
DOIs	https://doi.org/10.1109/ITC51656.2023.00041
Publication status	Published - 2023
Event	2023 IEEE International Test Conference (ITC) - Anaheim, United States Duration: 7 Oct 2023 → 15 Oct 2023

Publication series

Name	Proceedings - International Test Conference
ISSN (Print)	1089-3539

Conference

Conference	2023 IEEE International Test Conference (ITC)
Country/Territory	United States
City	Anaheim
Period	7/10/23 → 15/10/23

Bibliographical note

Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care
Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

Keywords

RRAM test
linear resistors
device-aware defect model
fault modeling
Design-for-Testability (DfT)

Access to Document

10.1109/ITC51656.2023.00041

Device-Aware_Test_for_Ion_Depletion_Defects_in_RRAMsFinal published version, 477 KB

Cite this

@inproceedings{6e98d1d8169d430cbc94b38d54a3d183,

title = "Device-Aware Test for Ion Depletion Defects in RRAMs",

abstract = "Many companies are heavily investing in the commercialization of Resistive Random Access Memories (RRAMs). This calls for a comprehensive understanding of manufacturing defects to develop efficient and high-quality test and diagnosis solutions to push high-volume production. This paper identifies and characterizes a new defect based on silicon measurements; the defect is called Ion Depletion (ID). In our case study, 45% cycles suffered from an intermittent reduction in high resistance state and did not impact low resistance state. The paper shows that the traditional fault modeling based on linear resistors as a defect model is not accurate. To address this challenge, the Device-Aware (DA) defect modeling method is applied; an RRAM model of the defective device is developed and calibrated using measurements to accurately describe the impact of the defect on the electrical behavior of the memory device. Afterward, fault analysis is performed based on the DA defect model, and appropriate fault models are introduced; they show that the ID defect may sensitize undefined state faults. Finally, dedicated test and diagnosis solutions for the ID defect are proposed.",

keywords = "RRAM test, linear resistors, device-aware defect model, fault modeling, Design-for-Testability (DfT)",

author = "Hanzhi Xun and Sicong Yuan and Moritz Fieback and Mottaqiallah Taouil and Said Hamdioui and Hassen Aziza",

note = "Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.; 2023 IEEE International Test Conference (ITC) ; Conference date: 07-10-2023 Through 15-10-2023",

year = "2023",

doi = "10.1109/ITC51656.2023.00041",

language = "English",

isbn = "979-8-3503-4359-5",

series = "Proceedings - International Test Conference",

publisher = "IEEE",

pages = "246--255",

editor = "Ceballos, {Cristina }",

booktitle = "Proceedings of the 2023 IEEE International Test Conference (ITC)",

address = "United States",

}

Xun, H , Yuan, S , Fieback, M , Taouil, M , Hamdioui, S & Aziza, H 2023, Device-Aware Test for Ion Depletion Defects in RRAMs. in C Ceballos (ed.), Proceedings of the 2023 IEEE International Test Conference (ITC). Proceedings - International Test Conference, IEEE, Piscataway, pp. 246-255, 2023 IEEE International Test Conference (ITC), Anaheim, United States, 7/10/23. https://doi.org/10.1109/ITC51656.2023.00041

Device-Aware Test for Ion Depletion Defects in RRAMs. / Xun, Hanzhi ; Yuan, Sicong ; Fieback, Moritz et al.
Proceedings of the 2023 IEEE International Test Conference (ITC). ed. / Cristina Ceballos. Piscataway: IEEE, 2023. p. 246-255 (Proceedings - International Test Conference).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

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AU - Hamdioui, Said

AU - Aziza, Hassen

N1 - Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.

PY - 2023

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N2 - Many companies are heavily investing in the commercialization of Resistive Random Access Memories (RRAMs). This calls for a comprehensive understanding of manufacturing defects to develop efficient and high-quality test and diagnosis solutions to push high-volume production. This paper identifies and characterizes a new defect based on silicon measurements; the defect is called Ion Depletion (ID). In our case study, 45% cycles suffered from an intermittent reduction in high resistance state and did not impact low resistance state. The paper shows that the traditional fault modeling based on linear resistors as a defect model is not accurate. To address this challenge, the Device-Aware (DA) defect modeling method is applied; an RRAM model of the defective device is developed and calibrated using measurements to accurately describe the impact of the defect on the electrical behavior of the memory device. Afterward, fault analysis is performed based on the DA defect model, and appropriate fault models are introduced; they show that the ID defect may sensitize undefined state faults. Finally, dedicated test and diagnosis solutions for the ID defect are proposed.

AB - Many companies are heavily investing in the commercialization of Resistive Random Access Memories (RRAMs). This calls for a comprehensive understanding of manufacturing defects to develop efficient and high-quality test and diagnosis solutions to push high-volume production. This paper identifies and characterizes a new defect based on silicon measurements; the defect is called Ion Depletion (ID). In our case study, 45% cycles suffered from an intermittent reduction in high resistance state and did not impact low resistance state. The paper shows that the traditional fault modeling based on linear resistors as a defect model is not accurate. To address this challenge, the Device-Aware (DA) defect modeling method is applied; an RRAM model of the defective device is developed and calibrated using measurements to accurately describe the impact of the defect on the electrical behavior of the memory device. Afterward, fault analysis is performed based on the DA defect model, and appropriate fault models are introduced; they show that the ID defect may sensitize undefined state faults. Finally, dedicated test and diagnosis solutions for the ID defect are proposed.

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DO - 10.1109/ITC51656.2023.00041

M3 - Conference contribution

SN - 979-8-3503-4359-5

T3 - Proceedings - International Test Conference

SP - 246

EP - 255

BT - Proceedings of the 2023 IEEE International Test Conference (ITC)

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PB - IEEE

CY - Piscataway

T2 - 2023 IEEE International Test Conference (ITC)

Y2 - 7 October 2023 through 15 October 2023

ER -

Device-Aware Test for Ion Depletion Defects in RRAMs

Abstract

Publication series

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Bibliographical note

Keywords

Access to Document

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