DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability

Jeckson D. Souza, Anderson L. Sartor, Luigi Carro, Mateus Beck Rutzig, Stephan Wong, Antonio C.S. Beck

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)


Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a configurable processor coupled with a reconfigurable fabric, which can leverage both design time configurability and runtime reconfigurability. We show that, on average, such system can improve performance by up to 1.41X and reduce energy by up to 60% when compared to a configurable processor at the cost of additional area.

Original languageEnglish
Title of host publicationApplied Reconfigurable Computing
Subtitle of host publicationArchitectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings
EditorsN. Voros, M. Huebner, G. Keramidas, D. Goehringer, C. Antonpoulos, P.C. Diniz
Place of PublicationCham
Number of pages12
ISBN (Electronic)978-3-319-7889-6
ISBN (Print)978-3-319-78889-0
Publication statusPublished - 2018
EventARC 2018: 14th International Symposium on Applied Reconfigurable Computing - Santorini, Greece
Duration: 2 May 20184 May 2018

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


ConferenceARC 2018


  • Reconfigurable accelerator
  • Configurable processor
  • Binary translation
  • Binary compatibility

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