DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability

Jeckson D. Souza; Anderson L. Sartor; Luigi Carro; Mateus Beck Rutzig; Stephan Wong; Antonio C.S. Beck

doi:10.1007/978-3-319-78890-6_30

DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability

Jeckson D. Souza, Anderson L. Sartor, Luigi Carro, Mateus Beck Rutzig, Stephan Wong, Antonio C.S. Beck

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

1 Citation (Scopus)

Abstract

Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a configurable processor coupled with a reconfigurable fabric, which can leverage both design time configurability and runtime reconfigurability. We show that, on average, such system can improve performance by up to 1.41X and reduce energy by up to 60% when compared to a configurable processor at the cost of additional area.

Original language	English
Title of host publication	Applied Reconfigurable Computing
Subtitle of host publication	Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings
Editors	N. Voros, M. Huebner, G. Keramidas, D. Goehringer, C. Antonpoulos, P.C. Diniz
Place of Publication	Cham
Publisher	Springer
Pages	367-378
Number of pages	12
ISBN (Electronic)	978-3-319-7889-6
ISBN (Print)	978-3-319-78889-0
DOIs	https://doi.org/10.1007/978-3-319-78890-6_30
Publication status	Published - 2018
Event	ARC 2018: 14th International Symposium on Applied Reconfigurable Computing - Santorini, Greece Duration: 2 May 2018 → 4 May 2018

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Publisher	Springer
Volume	10824
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	ARC 2018
Country/Territory	Greece
City	Santorini
Period	2/05/18 → 4/05/18

Keywords

Reconfigurable accelerator
Configurable processor
Binary translation
Binary compatibility

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1007/978-3-319-78890-6_30

Cite this

Souza, J. D., Sartor, A. L., Carro, L., Rutzig, M. B., Wong, S., & Beck, A. C. S. (2018). DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability. In N. Voros, M. Huebner, G. Keramidas, D. Goehringer, C. Antonpoulos, & P. C. Diniz (Eds.), Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings (pp. 367-378). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 10824 ). Springer. https://doi.org/10.1007/978-3-319-78890-6_30

Souza, Jeckson D. ; Sartor, Anderson L. ; Carro, Luigi et al. / DIM-VEX : Exploiting Design Time Configurability and Runtime Reconfigurability. Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. editor / N. Voros ; M. Huebner ; G. Keramidas ; D. Goehringer ; C. Antonpoulos ; P.C. Diniz. Cham : Springer, 2018. pp. 367-378 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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title = "DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability",

abstract = "Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a configurable processor coupled with a reconfigurable fabric, which can leverage both design time configurability and runtime reconfigurability. We show that, on average, such system can improve performance by up to 1.41X and reduce energy by up to 60% when compared to a configurable processor at the cost of additional area.",

keywords = "Reconfigurable accelerator , Configurable processor, Binary translation, Binary compatibility ",

author = "Souza, {Jeckson D.} and Sartor, {Anderson L.} and Luigi Carro and Rutzig, {Mateus Beck} and Stephan Wong and Beck, {Antonio C.S.}",

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editor = "N. Voros and M. Huebner and G. Keramidas and D. Goehringer and C. Antonpoulos and P.C. Diniz",

booktitle = "Applied Reconfigurable Computing",

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Souza, JD, Sartor, AL, Carro, L, Rutzig, MB, Wong, S & Beck, ACS 2018, DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability. in N Voros, M Huebner, G Keramidas, D Goehringer, C Antonpoulos & PC Diniz (eds), Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 10824 , Springer, Cham, pp. 367-378, ARC 2018, Santorini, Greece, 2/05/18. https://doi.org/10.1007/978-3-319-78890-6_30

DIM-VEX : Exploiting Design Time Configurability and Runtime Reconfigurability. / Souza, Jeckson D.; Sartor, Anderson L.; Carro, Luigi et al.

Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. ed. / N. Voros; M. Huebner; G. Keramidas; D. Goehringer; C. Antonpoulos; P.C. Diniz. Cham : Springer, 2018. p. 367-378 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 10824 ).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

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AB - Embedded processors must efficiently deliver performance at low energy consumption. Both configurable and reconfigurable techniques can be used to fulfill such constraints, although applied in different situations. In this work, we propose DIM-VEX, a configurable processor coupled with a reconfigurable fabric, which can leverage both design time configurability and runtime reconfigurability. We show that, on average, such system can improve performance by up to 1.41X and reduce energy by up to 60% when compared to a configurable processor at the cost of additional area.

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BT - Applied Reconfigurable Computing

A2 - Voros, N.

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Souza JD, Sartor AL, Carro L, Rutzig MB, Wong S, Beck ACS. DIM-VEX: Exploiting Design Time Configurability and Runtime Reconfigurability. In Voros N, Huebner M, Keramidas G, Goehringer D, Antonpoulos C, Diniz PC, editors, Applied Reconfigurable Computing: Architectures, Tools, and Applications - 14th International Symposium, ARC 2018, Proceedings. Cham: Springer. 2018. p. 367-378. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-319-78890-6_30