TY - GEN
T1 - Effective reconfigurable design
T2 - 10th International Symposium on Reconfigurable Computing: Architectures, Tools, and Applications, ARC 2014
AU - Pnevmatikatos, D. N.
AU - Becker, T.
AU - Brokalakis, A.
AU - Gaydadjiev, G. N.
AU - Luk, W.
AU - Papadimitriou, K.
AU - Papaefstathiou, I.
AU - Pau, D.
AU - Pell, Oliver
AU - Pilato, C.
AU - Santambrogio, M. D.
AU - Sciuto, D.
AU - Stroobandt, D.
PY - 2014
Y1 - 2014
N2 - While fine-grain, reconfigurable devices have been available for years, they are mostly used in a fixed functionality, "asic-replacement" manner. To exploit opportunities for flexible and adaptable run-time exploitation of fine grain reconfigurable resources (as implemented currently in dynamic, partial reconfiguration), better tool support is needed. The FASTER project aims to provide a methodology and a tool-chain that will enable designers to efficiently implement a reconfigurable system on a platform combining software and reconfigurable resources. Starting from a high-level application description and a target platform, our tools analyse the application, evaluate reconfiguration options, and implement the designer choices on underlying vendor tools. In addition, FASTER addresses micro-reconfiguration, verification, and the run-time management of system resources. We use industrial applications to demonstrate the effectiveness of the proposed framework and identify new opportunities for reconfigurable technologies.
AB - While fine-grain, reconfigurable devices have been available for years, they are mostly used in a fixed functionality, "asic-replacement" manner. To exploit opportunities for flexible and adaptable run-time exploitation of fine grain reconfigurable resources (as implemented currently in dynamic, partial reconfiguration), better tool support is needed. The FASTER project aims to provide a methodology and a tool-chain that will enable designers to efficiently implement a reconfigurable system on a platform combining software and reconfigurable resources. Starting from a high-level application description and a target platform, our tools analyse the application, evaluate reconfiguration options, and implement the designer choices on underlying vendor tools. In addition, FASTER addresses micro-reconfiguration, verification, and the run-time management of system resources. We use industrial applications to demonstrate the effectiveness of the proposed framework and identify new opportunities for reconfigurable technologies.
UR - http://www.scopus.com/inward/record.url?scp=84958542213&partnerID=8YFLogxK
U2 - 10.1007/978-3-319-05960-0_35
DO - 10.1007/978-3-319-05960-0_35
M3 - Conference contribution
AN - SCOPUS:84958542213
SN - 9783319059594
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 318
EP - 323
BT - Reconfigurable Computing
PB - Springer
Y2 - 14 April 2014 through 16 April 2014
ER -