Efficient tests and DFT for RAM address decoder delay faults

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

Original languageUndefined/Unknown
Title of host publication3rd International Design and Test workshop
Editors s.n.
Place of PublicationPiscataway
PublisherIEEE Society
Pages225-230
Number of pages6
ISBN (Print)978-1-4244-3477-0
Publication statusPublished - 2008
EventIDT2008 - Piscataway
Duration: 20 Dec 200822 Dec 2008

Publication series

Name
PublisherIEEE

Conference

ConferenceIDT2008
Period20/12/0822/12/08

Keywords

  • Elektrotechniek
  • Techniek
  • conference contrib. refereed
  • Conf.proc. > 3 pag

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