Abstract
The CMOS silicon avalanche-mode light-emitting diode (AMLED) has emerged as a potential light source for monolithic optical interconnects. Earlier we presented a superjunction light-emitting diode (SJLED) that offers a higher electroluminescent intensity compared to a conventional AMLED because of its more uniform field distribution. However, for reducing power consumption low-voltage ( \leq 15\text{V} ) SJLEDs are desired, not explored before. In this work we present a TCAD simulation feasibility study of the low-voltage SJLED for various doping concentrations and device dimensions. The results show that for obtaining a constant field, approximately a tenfold more aggressive charge balance condition in the SJLED is estimated than traditionally reported. This is important for establishing a guideline to realize optimized RESURF and SJLEDs in the ever-shrinking advanced CMOS nodes.
Original language | English |
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Pages (from-to) | 1188-1191 |
Journal | IEEE Electron Device Letters |
Volume | 42 |
Issue number | 8 |
DOIs | |
Publication status | Published - 2021 |
Bibliographical note
Accepted Author ManuscriptKeywords
- Avalanche breakdown
- diode
- light-emitting diode (LED)
- power
- silicon