Evaluating the Impact of Process Variation on RRAMs

E. Brum, M. Fieback, T.S. Copetti, H. Jiayi, S. Hamdioui, F. Vargas, L.M. Bolzani Poehls

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

2 Citations (Scopus)


Over the last fifty years Complementary Metal Oxide Semiconductor (CMOS) technology has been scaled down, making the design of high-performance applications possible. However, there is a growing concern that device scaling will become infeasible below a certain feature size. In parallel, emerging applications present high demands regarding storage and computing capability, combined with challenging constraints. In this scenario, memristive devices have become promising candidates to replace or complement CMOS technology due to their CMOS manufacturing process compatibility, zero standby power consumption as well as high scalability and density. Despite these advantages, the implementation of high-density memories based on memristive devices poses some challenges related manufacturing process variation and consequently, to their reliability during lifetime. This paper investigates the impact of manufacturing process variation on Resistive Random Access Memories (RRAMs). In more detail, an evaluation of the RRAM's functionality when considering different levels of manufacturing process variation is performed. The obtained results show that different parameters can degrade the functionality of the RRAM cell as well as that there is a relation between the performed operating sequence and the tolerated percentage of variability. Finally, it is important to mention that understanding how process variation impacts the functionality of RRAM cells is considered essential to guarantee their reliability during lifetime, also allowing to optimize manufacturing processes.
Original languageEnglish
Title of host publication2021 IEEE 22nd Latin American Test Symposium, LATS 2021
Subtitle of host publicationProceedings
Place of PublicationDanvers
Number of pages6
ISBN (Electronic)978-1-6654-2057-0
ISBN (Print)978-1-6654-2058-7
Publication statusPublished - 2021
Event2021 IEEE 22nd Latin American Test Symposium (LATS) - Virtual at Punta del Este, Uruguay
Duration: 27 Oct 202129 Oct 2021
Conference number: 22nd

Publication series

Name2021 IEEE 22nd Latin American Test Symposium, LATS 2021


Conference2021 IEEE 22nd Latin American Test Symposium (LATS)
CityVirtual at Punta del Este


  • Process Variation
  • RRAMs
  • Memory's Functionality


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