Exploiting Approximate Computing for implementing Low Cost Fault Tolerance Mechanisms

A. Bosio, I. O'Connor, G. S. Rodrigues, F. K. Lima, S. Hamdioui

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

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Abstract

Today's computer architectures and semiconductor technologies are facing major challenges making them incapable to deliver the required features (such as computer efficiency) for emerging applications. Alternative architectures are being under investigation in order to continue deliver sustainable benefits for the foreseeable future society at affordable cost. These architectures are not only changing the traditional computing paradigm (e.g., in terms of programming models, compilers, circuit design), but also setting up new challenges and opportunities concerning the test and reliability. This tutorial targets the challenges and opportunities of using approximate computing for achieving low cost fault tolerance mechanisms.

Original languageEnglish
Title of host publicationProceedings - 2020 15th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2020
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Number of pages2
ISBN (Electronic)9781728154268
DOIs
Publication statusPublished - 1 Apr 2020
Event15th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2020 - Marrakesh, Morocco
Duration: 1 Apr 20203 Apr 2020
Conference number: 15

Conference

Conference15th IEEE International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2020
Abbreviated titleDTIS 2020
CountryMorocco
CityMarrakesh
Period1/04/203/04/20
OtherVirtual/online event due to COVID-19

Keywords

  • Approximate computing
  • Fault model
  • Reliability
  • Test

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