Fast 32-channel readout chip with counters for GEMs, APDs and MGCs

RW Hollander, CWE van Eijk, J Huizenga, GW Lubking, DD Gans, JBJ Schelen

    Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientific

    Abstract

    New bright radiation sources like the new generation spallation sources, require fast detectors and fast readout electronics. Position sensitive detectors for imaging applications will be segmented and data rates of 10/sup 7/ s/sup -1/ per readout channel are envisaged. We are developing a 32-channel self triggering fast readout chip, with two 24-bit 100 MHz counters per channel. Per chip one calibration input, the analog output of one selectable channel and the common OR-ed comparator output are available for testing and calibration. The common comparator threshold is set on chip with a DAC. Noisy channels can be disabled. Two counters per channel are implemented for off-line correction of 2-channel clusters. Most parts of the chip are tested and some are available as separate chips. On the 8 channel preamplifier-shaper chip for each channel a 50 /spl Omega/ output buffer has been added. Rise and fail times of 2.4 ns and 7.6 ns respectively have been obtained.
    Original languageUndefined/Unknown
    Title of host publicationConference records of the IEEE 2001 Nuclear Science Symposium and Medical Imaging Conference, on www.eecs.umich.edu/~fessler/nssmicol
    Pages1-3
    Number of pages3
    DOIs
    Publication statusPublished - 2001

    Keywords

    • ZX Int.klas.verslagjaar < 2002

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