Fault-Tolerant Asymmetrical Multilevel Inverter with Preserved Output Power under Post-Fault Operation

Anilkumar Chappa*, Shubhrata Gupta, Lalit Kumar Sahu, Krishna Kumar Gupta, Hani Vahedi

*Corresponding author for this work

Research output: Contribution to journalArticleScientificpeer-review

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Abstract

Multilevel inverters (MLIs) are widely employed in high power and high voltage applications due to their advantages like better power quality and lower voltage stress across power switches compared to the traditional two-level inverter. However, the utilization of higher number of power semiconductor devices and capacitors results in less reliability. In this regard, a fault-tolerant MLI (FTMLI) with asymmetrical source configuration is developed which can tolerate the open-circuit and short-circuit switch failures (single and multiple switch faults). The proposed topology preserves the output power and balances the capacitor's voltage under pre and postfault conditions. Further, a new switching scheme is proposed to reduce the ripple content in the capacitor's voltage. Further, under postfault operation uses less number of conducting switches resulting in a better efficiency. The proposed FTMLI generates a higher number of voltage levels with less number of component counts when compared with recently proposed topologies. Moreover, this comparative study reveals the prevalence of the proposed converter in the recent literature. The conducted experimental test proves the effectiveness and fault-tolerant feature of the proposed topology.

Original languageEnglish
Pages (from-to)6764-6773
Number of pages10
JournalIEEE Transactions on Industrial Electronics
Volume69
Issue number7
DOIs
Publication statusPublished - 2022
Externally publishedYes

Keywords

  • Asymmetrical multilevel inverter (MLI)
  • capacitor voltage balancing
  • fault-tolerant (FT) operation
  • open-circuit (OC) and short-circuit (SC) faults
  • ripple reduction in capacitor voltage
  • single and multiple switch faults

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