In this paper, we introduce the concept of flux caches envisioned to improve processor performance by dynamically changing the cache organization and implementation. Contrary to the traditional approaches, processors designed with flux caches instead of assuming a hardwired cache organization change their cache ¿design¿ on program demand. Consequently program (data and instruction) dynamic behavior determines the cache hardware design. Experimental results to confirm the flux caches potential are also presented.
|Name||Lecture Notes in Computer Science|
|Conference||5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005)Samos, Greece|
|Period||18/07/05 → 20/07/05|
- conference contrib. refereed
- ZX CWTS JFIS < 1.00