FPGA-area allocation for partial run-time reconfiguration

E Moscu Panainte; K Bertels; S Vassiliadis

FPGA-area allocation for partial run-time reconfiguration

E Moscu Panainte, K Bertels, S Vassiliadis

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific

Original language	Undefined/Unknown
Title of host publication	Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing
Editors	s.n.
Place of Publication	Utrecht
Publisher	Dutch Technology Foundation
Pages	415-420
Number of pages	6
ISBN (Print)	90-73461-50-2
Publication status	Published - 2005
Event	ProRISC 2005, the 16th Annual Workshop on Circuits, Systems and Signal Processing, Veldhoven, the Netherlands - Utrecht Duration: 17 Nov 2005 → 18 Nov 2005

Publication series

Name
Publisher	Dutch Technology Foundation

Conference

Conference	ProRISC 2005, the 16th Annual Workshop on Circuits, Systems and Signal Processing, Veldhoven, the Netherlands
Period	17/11/05 → 18/11/05

Bibliographical note

editors onbekend, sb

Keywords

Vakpubl., Overig wet. > 3 pag

Cite this

@inproceedings{3bc14f3011b948e19604c080b32b714b,

title = "FPGA-area allocation for partial run-time reconfiguration",

keywords = "Vakpubl., Overig wet. > 3 pag",

author = "{Moscu Panainte}, E and K Bertels and S Vassiliadis",

note = "editors onbekend, sb; null ; Conference date: 17-11-2005 Through 18-11-2005",

year = "2005",

language = "Undefined/Unknown",

isbn = "90-73461-50-2",

publisher = "Dutch Technology Foundation",

pages = "415--420",

editor = "s.n.",

booktitle = "Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing",

}

Moscu Panainte, E, Bertels, K & Vassiliadis, S 2005, FPGA-area allocation for partial run-time reconfiguration. in s.n. (ed.), Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing. Dutch Technology Foundation, Utrecht, pp. 415-420, ProRISC 2005, the 16th Annual Workshop on Circuits, Systems and Signal Processing, Veldhoven, the Netherlands, 17/11/05.

FPGA-area allocation for partial run-time reconfiguration. / Moscu Panainte, E; Bertels, K; Vassiliadis, S.

Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing. ed. / s.n. Utrecht : Dutch Technology Foundation, 2005. p. 415-420.

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific

TY - GEN

T1 - FPGA-area allocation for partial run-time reconfiguration

AU - Moscu Panainte, E

AU - Bertels, K

AU - Vassiliadis, S

N1 - editors onbekend, sb

PY - 2005

Y1 - 2005

KW - Vakpubl., Overig wet. > 3 pag

M3 - Conference contribution

SN - 90-73461-50-2

SP - 415

EP - 420

BT - Proceedings of ProRISC 2005, 16th Annual Workshop on Circuits, Systems and Signal Processing

A2 - s.n., null

PB - Dutch Technology Foundation

CY - Utrecht

Y2 - 17 November 2005 through 18 November 2005

ER -