Front to back-side 3D interconnects fabrication process based on controlled cu electroplating of high aspect ratio through silicon vias (HAR-TSVs)

M Saadaoui, WHA Wien, HW van Zeijl, H Schellevis, M Laros, PM Sarro

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

8 Citations (Scopus)
Original languageUndefined/Unknown
Title of host publication10th electronics packaging technology conference
EditorsT Yang, T Kheng
Place of PublicationSingapore
PublisherIEEE Society
Pages219-223
Number of pages5
ISBN (Print)978-1-4244-2118-3
Publication statusPublished - 2008
EventEPTC 2008, Singapore - Singapore
Duration: 9 Dec 200812 Dec 2008

Publication series

Name
PublisherIEEE

Conference

ConferenceEPTC 2008, Singapore
Period9/12/0812/12/08

Keywords

  • conference contrib. refereed
  • Conf.proc. > 3 pag

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