High-Fidelity Controlled- Z Gate with Maximal Intermediate Leakage Operating at the Speed Limit in a Superconducting Quantum Processor

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Abstract

Simple tuneup of fast two-qubit gates is essential for the scaling of quantum processors. We introduce the sudden variant (SNZ) of the net zero scheme realizing controlled-Z (CZ) gates by flux control of transmon frequency. SNZ CZ gates realized in a multitransmon processor operate at the speed limit of transverse coupling between computational and noncomputational states by maximizing intermediate leakage. Beyond speed, the key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.

Original languageEnglish
Article number220502
Number of pages6
JournalPhysical Review Letters
Volume126
Issue number22
DOIs
Publication statusPublished - 2021

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