@inproceedings{b6a0560d9c864507827541bceec81320,
title = "High level Synthesis of Asynchronous Circuits from Data Flow Graphs",
keywords = "CWTS JFIS < 0.75",
author = "{van Leuken}, TGRM and Leeuwen, {T (extern)} and {Lincklaen Arriens}, H",
year = "2011",
doi = "10.1007/978-3-642-24153-3-32",
language = "English",
isbn = "978-3642- 24153-6",
publisher = "Springer",
pages = "317--330",
editor = "{Ayale et al}, J",
booktitle = "Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation",
note = "PATMOS 2011, Madrid, Spain ; Conference date: 26-09-2011 Through 29-09-2011",
}