Abstract
State-of-the-Art (SotA) hardware implementations of Deep Neural Networks (DNNs) incur high latencies and costs. Binary Neural Networks (BNNs) are potential alternative solutions to realize faster implementations without losing accuracy. In this paper, we first present a new data mapping, called TacitMap, suited for BNNs implemented based on a Computation-In-Memory (CIM) architecture. TacitMap maximizes the use of available parallelism, while CIM architecture eliminates the data movement overhead. We then propose a hardware accelerator based on optical phase change memory (oPCM) called EinsteinBarrier. Ein-steinBarrier incorporates TacitMap and adds an extra dimension for parallelism through wavelength division multiplexing, leading to extra latency reduction. The simulation results show that, compared to the SotA CIM baseline, TacitMap and EinsteinBarrier significantly improve execution time by up to ∼ 154× and ∼ 3113×, respectively, while also maintaining the energy consumption within 60% of that in the CIM baseline.
Original language | English |
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Title of host publication | 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE) |
Place of Publication | Piscataway |
Publisher | IEEE |
Number of pages | 6 |
ISBN (Electronic) | 978-3-9819263-8-5 |
ISBN (Print) | 979-8-3503-4860-6 |
Publication status | Published - 2024 |
Event | 2024 Design, Automation and Test in Europe Conference and Exhibition, DATE 2024 - Valencia, Spain Duration: 25 Mar 2024 → 27 Mar 2024 |
Conference
Conference | 2024 Design, Automation and Test in Europe Conference and Exhibition, DATE 2024 |
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Country/Territory | Spain |
City | Valencia |
Period | 25/03/24 → 27/03/24 |
Bibliographical note
Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-careOtherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.