@inproceedings{f6345aad7bae46618e1668460de4c2ab,
title = "High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding",
abstract = "Binary Signed-Digit Residue Number System (BSD-RNS) has been proposed in the literatures as an appropriate number system to perform the arithmetic operations in parallel. BSD-RNS addition is the basic operation and improving its performance results in efficient VLSI arithmetic circuits. Here, we present a new architecture for carry-free BSD-RNS addition utilizing a recently proposed posibit and negabit BSD representation. Compared to 2's complement BSD-RNS adder, the proposed architecture has 21% less delay. Besides, for a same delay (0.6ns), we obtain 48% less area and 28% less power than the most efficient existing BSD-RNS adder.",
keywords = "Binary Signed Digit, Carry-Free Addition, Residue Number System",
author = "Somayeh Timarchi and Maryam Saremi and Mahmood Fazlali and Georgi Gaydadjiev",
year = "2013",
doi = "10.1109/VLSI-SoC.2013.6673248",
language = "English",
isbn = "9781479905249",
series = "IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC",
publisher = "IEEE",
pages = "58--59",
booktitle = "2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013 - Proceedings",
address = "United States",
note = "2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013 ; Conference date: 07-10-2013 Through 09-10-2013",
}