High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding

Somayeh Timarchi, Maryam Saremi, Mahmood Fazlali, Georgi Gaydadjiev

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

5 Citations (Scopus)

Abstract

Binary Signed-Digit Residue Number System (BSD-RNS) has been proposed in the literatures as an appropriate number system to perform the arithmetic operations in parallel. BSD-RNS addition is the basic operation and improving its performance results in efficient VLSI arithmetic circuits. Here, we present a new architecture for carry-free BSD-RNS addition utilizing a recently proposed posibit and negabit BSD representation. Compared to 2's complement BSD-RNS adder, the proposed architecture has 21% less delay. Besides, for a same delay (0.6ns), we obtain 48% less area and 28% less power than the most efficient existing BSD-RNS adder.

Original languageEnglish
Title of host publication2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013 - Proceedings
PublisherIEEE
Pages58-59
Number of pages2
ISBN (Print)9781479905249
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013 - Istanbul, Turkey
Duration: 7 Oct 20139 Oct 2013

Publication series

NameIEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC
ISSN (Print)2324-8432
ISSN (Electronic)2324-8440

Conference

Conference2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration, VLSI-SoC 2013
Country/TerritoryTurkey
CityIstanbul
Period7/10/139/10/13

Keywords

  • Binary Signed Digit
  • Carry-Free Addition
  • Residue Number System

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