How significant will be the test cost share for 3D Die-to-Wafer stacked-ICs?

M Taouil, S Hamdioui, E Marinissen

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

6 Citations (Scopus)
Original languageEnglish
Title of host publication6th International conference on Design & Technology of Integrated Systems in nanoscale era
EditorsI Voyiatzis, H-J Wunderlich
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages1-6
Number of pages6
ISBN (Print)978-1-61284-899-0
DOIs
Publication statusPublished - 2011
EventDTIS11 - Piscataway, NJ, USA
Duration: 6 Apr 20118 Apr 2011

Publication series

Name
PublisherIEEE

Conference

ConferenceDTIS11
Period6/04/118/04/11

Keywords

  • Elektrotechniek
  • Techniek
  • Conf.proc. > 3 pag

Cite this

Taouil, M., Hamdioui, S., & Marinissen, E. (2011). How significant will be the test cost share for 3D Die-to-Wafer stacked-ICs? In I. Voyiatzis, & H-J. Wunderlich (Eds.), 6th International conference on Design & Technology of Integrated Systems in nanoscale era (pp. 1-6). IEEE Society. https://doi.org/10.1109/DTIS.2011.5941432