The rapid diversification in microelectronics forebodes more complex system integration, be it for denser function integration or a span of dimensions between various technologies. Products may include more features, perform faster and be cheaper. With these trends the amount of material layers is increasing. This challenges development to a faster rating of material pairings. Delamination is a major issue among the related reliability aspects. When the design or testing steps are accompanied by simulation, fracture mechanical descriptions are increasingly proving helpful. The parameters needed for simulation have to be measured and should be available for different fracture mode mix angles. We investigated the interfacial fracture toughness of the Epoxy Molding Compound (EMC) to Silicon interface. Although difficult to delaminate we could carry out measurements using the Mixed Mode Chisel setup (MMC) that allowed us to induce different stress states at the crack tip at various external load angles. The samples we derived from the molding process of embedded wafer level ball grid arrays. Therefore we were able to use samples made with the same process as in real packaging. The crack tip position was determined by analysis of displacement results by digital image correlation.
In order to interpret the sample reaction for extracting fracture mechanical parameters, adequate numerical modeling and simulation was required. The experiments provided the
parameters for the models. Establishing the residual stress state in the materials preceded the interface delamination simulation: a two step interpretation. Residual stresses cannot be neglected; indeed they are part of the challenges to delaminate this interface at all. We found energy release rates increasing with fracture mode mix, and such values close to pure tensile opening at the crack tip. We recommend to exclude data from short crack lengths and to carefully expose the sample flanks. The results
promise to extend the available interfacial fracture data soon.
|Title of host publication||Proceedings 60th Electronic Components and Technology Conference (ECTC), 1-4- June 2010, Las Vegas, NV, USA|
|Number of pages||7|
|Publication status||Published - 2010|
- conference contrib. refereed
- Conf.proc. > 3 pag