Interprocedural optimization for dynamic hardware configurations

E Moscu Panainte; K Bertels; S Vassiliadis

doi:DOI:10.1007/11512622_2

Interprocedural optimization for dynamic hardware configurations

E Moscu Panainte, K Bertels, S Vassiliadis

Computer Engineering

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

1 Citation (Scopus)

Original language	Undefined/Unknown
Title of host publication	Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005)
Editors	TD Hämäläinen, AD Pimentel, J Takala, S Vassiliadis
Place of Publication	Berlin
Publisher	Springer Science+Business Media
Pages	2-11
Number of pages	10
ISBN (Print)	3-540-26969-X
DOIs	https://doi.org/DOI:10.1007/11512622_2
Publication status	Published - 2005
Event	5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005), Samos, Greece - Berlin Duration: 18 Jul 2005 → 20 Jul 2005

Publication series

Name
Publisher	Springer

Name	Lecture Notes in Computer Science
Volume	3553
ISSN (Print)	0302-9743

Conference

Conference	5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005), Samos, Greece
Period	18/07/05 → 20/07/05

Bibliographical note

zou 4T moeten zijn-correctie vragen bij BTA, sb

Keywords

conference contrib. refereed
Conf.proc. > 3 pag

Access to Document

DOI:10.1007/11512622_2

Cite this

Moscu Panainte, E., Bertels, K., & Vassiliadis, S. (2005). Interprocedural optimization for dynamic hardware configurations. In TD. Hämäläinen, AD. Pimentel, J. Takala, & S. Vassiliadis (Eds.), Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005) (pp. 2-11). (Lecture Notes in Computer Science; Vol. 3553). Springer Science+Business Media. https://doi.org/DOI:10.1007/11512622_2

Moscu Panainte, E ; Bertels, K ; Vassiliadis, S. / Interprocedural optimization for dynamic hardware configurations. Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005). editor / TD Hämäläinen ; AD Pimentel ; J Takala ; S Vassiliadis. Berlin : Springer Science+Business Media, 2005. pp. 2-11 (Lecture Notes in Computer Science).

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author = "{Moscu Panainte}, E and K Bertels and S Vassiliadis",

note = "zou 4T moeten zijn-correctie vragen bij BTA, sb; null ; Conference date: 18-07-2005 Through 20-07-2005",

year = "2005",

doi = "DOI:10.1007/11512622_2",

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isbn = "3-540-26969-X",

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Moscu Panainte, E, Bertels, K & Vassiliadis, S 2005, Interprocedural optimization for dynamic hardware configurations. in TD Hämäläinen, AD Pimentel, J Takala & S Vassiliadis (eds), Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005). Lecture Notes in Computer Science, vol. 3553, Springer Science+Business Media, Berlin, pp. 2-11, 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005), Samos, Greece, 18/07/05. https://doi.org/DOI:10.1007/11512622_2

Interprocedural optimization for dynamic hardware configurations. / Moscu Panainte, E; Bertels, K; Vassiliadis, S.

Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005). ed. / TD Hämäläinen; AD Pimentel; J Takala; S Vassiliadis. Berlin : Springer Science+Business Media, 2005. p. 2-11 (Lecture Notes in Computer Science; Vol. 3553).

Research output: Chapter in Book/Conference proceedings/Edited volume › Conference contribution › Scientific › peer-review

TY - GEN

T1 - Interprocedural optimization for dynamic hardware configurations

AU - Moscu Panainte, E

AU - Bertels, K

AU - Vassiliadis, S

N1 - zou 4T moeten zijn-correctie vragen bij BTA, sb

PY - 2005

Y1 - 2005

KW - conference contrib. refereed

KW - Conf.proc. > 3 pag

U2 - DOI:10.1007/11512622_2

DO - DOI:10.1007/11512622_2

M3 - Conference contribution

SN - 3-540-26969-X

SP - 2

EP - 11

BT - Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005)

A2 - Hämäläinen, TD

A2 - Pimentel, AD

A2 - Takala, J

A2 - Vassiliadis, S

PB - Springer Science+Business Media

CY - Berlin

Y2 - 18 July 2005 through 20 July 2005

ER -

Moscu Panainte E, Bertels K, Vassiliadis S. Interprocedural optimization for dynamic hardware configurations. In Hämäläinen TD, Pimentel AD, Takala J, Vassiliadis S, editors, Proceedings of the 5th international workshop on computer systems: architectures, modelling, and simulation (SAMOS 2005). Berlin: Springer Science+Business Media. 2005. p. 2-11. (Lecture Notes in Computer Science). https://doi.org/DOI:10.1007/11512622_2