Ionizing radiation modeling in DRAM transistors

Electronics in space suffer from increased wear-out due to the accumulation of high concentrations of ionizing dose. The costs of a space mission in combination with the harsh space environment force space agencies to demand electronic components with extreme high reliability to guarantee mission success. One of the main reliability concerns for DRAM is the retention time degradation due to radiation, as radiation increases the Gate Induced Drain Leakage (GIDL). In this work we present a methodology to develop a Spice-based radiation model that could be used to simulate this retention time degradation. The model estimates the GIDL based on existing silicon measurements of the retention time and gives designers the opportunity to measure the impact of radiation during the design stage. Simulation results show a strong retention time degradation for small Total Ionizing Dose (TID) while this stabilizes with larger TID. The application of the model with space radiation environment data shows that the damage that spacecrafts suffer depends strongly on altitude and aging time.