@inproceedings{89d8024d8ae24418a1405aa73ec33d21,
title = "Linearity analysis of a CMOS image sensor",
abstract = "In this paper, we analyze the causes of the nonlinearity of a voltage-mode CMOS image sensor, including a theoretical derivation and a numerical simulation. A prototype chip designed in a 0.18 μm 1-poly 4-metal CMOS process technology is implemented to verify this analysis. The pixel array is 160 × 80 with a pitch of 15 μm, and it contains dozens of groups of pixels that have different design parameters. From the measurement results, we confirmed these factors affecting the linearity and can give guidance for a future design to realize a high linearity CMOS image sensor.",
keywords = "CMOS image sensor, Linearity, Voltage mode",
author = "Fei Wang and Theuwissen, {Albert J.P.}",
year = "2017",
doi = "10.2352/issn.2470-1173.2017.11.imse-191",
language = "English",
series = "Electronic Imaging",
publisher = "Society for Imaging Science and Technology",
pages = "84--90",
booktitle = "Electronic Imaging",
note = "2017 IS&T International Symposium on Electronic Imaging ; Conference date: 31-01-2017 Through 02-02-2017",
}