Logic-enhanced memory for 3D graphics tile-based rasterizers

D Crisu, SD Cotofana, S Vassiliadis, P Liuha

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)
Original languageUndefined/Unknown
Title of host publicationThe 2004 47th Midwest symposium on Circuits and Systems
Place of PublicationPiscataway
PublisherIEEE Society
Pages237-240
Number of pages4
ISBN (Print)0-7803-8346-X
Publication statusPublished - 2004
EventThe 2004 47th Midwest symposium on Circuits and Systems, Hiroshima, Japan - Piscataway
Duration: 25 Jul 200428 Jul 2004

Publication series

Name
PublisherIEEE

Conference

ConferenceThe 2004 47th Midwest symposium on Circuits and Systems, Hiroshima, Japan
Period25/07/0428/07/04

Keywords

  • conference contrib. refereed
  • Conf.proc. > 3 pag

Cite this

Crisu, D., Cotofana, SD., Vassiliadis, S., & Liuha, P. (2004). Logic-enhanced memory for 3D graphics tile-based rasterizers. In The 2004 47th Midwest symposium on Circuits and Systems (pp. 237-240). IEEE Society.