In this paper, a low-power version of a high-precision smart temperature sensor in 0.7Â¿m CMOS technology is presented. The sensor consists of two main blocks: the bipolar front-end and the ADC. The sensor's power dissipation was reduced by reducing the bias current of the substrate PNP transistors - the temperature-sensing element - to the minimum levels set by accuracy requirements. To keep the same current density, the PNPs were reduced in size, as were the ADC sampling capacitors CS, so the sensor's conversion time is maintained. Increased mismatch errors due to the use of lower bias currents and smaller devices are mitigated by Dynamic Element Matching and chopping techniques. For an accuracy requirement of Â±0.1Â°C, a minimum PNP bias current of 250nA is found. Measurement results for Ibias = 250nA and CS = 1.25pF show a 3Â¿ inaccuracy below Â±0.3Â°C after offset calibration, and below Â±0.08Â°C with a two-point calibration, from -55Â°C to 125Â°C.
|Conference||IEEE Sensors 2007|
|Period||28/10/07 → 31/10/07|
- conference contrib. refereed
- Conf.proc. > 3 pag