Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures

L. Lao, B. van Wee, Imran Ashraf, J. van Someren, N. Khammassi, K. Bertels, C.G. Almudever

Research output: Contribution to journalArticleScientificpeer-review

26 Citations (Scopus)
112 Downloads (Pure)


Quantum error correction (QEC) and fault-tolerant (FT) mechanisms are essential for reliable quantum computing. However, QEC considerably increases the computation size up to four orders of magnitude. Moreover, FT implementation has specific requirements on qubit layouts, causing both resource and time overhead. Reducing spatial-temporal costs becomes critical since it is beneficial to decrease the failure rate of quantum computation. To this purpose, scalable qubit plane architectures and efficient mapping passes including placement and routing of qubits as well as scheduling of operations are needed. This paper proposes a full mapping process to execute lattice surgery-based quantum circuits on two surface code architectures, namely a checkerboard and a tile-based one. We show that the checkerboard architecture is 2x qubit-efficient but the tile-based one requires lower communication overhead in terms of both operation overhead (up to 86%) and latency overhead (up to 79%).
Original languageEnglish
Article number015005
Pages (from-to)1-20
Number of pages20
JournalQuantum Science and Technology
Issue number1
Publication statusPublished - 2019

Bibliographical note

Accepted author manuscript


  • lattice surgery
  • operation scheduling
  • quantum computing
  • qubit placement and routing
  • qubit plane architecture
  • surface code


Dive into the research topics of 'Mapping of Lattice Surgery-based Quantum Circuits on Surface Code Architectures'. Together they form a unique fingerprint.

Cite this