N-bit Data Parallel Spin Wave Logic Gate

A.N.N. Mahmoud, Frederic Vanderveken, Florin Ciubotaru, Christoph Adelmann, Sorin Cotofana, Said Hamdioui

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

5 Downloads (Pure)

Abstract

Due to their very nature, Spin Waves (SWs) created in the same waveguide, but with different frequencies, can coexist while selectively interacting with their own species only. The absence of inter-frequency interferences isolates input data sets encoded in SWs with different frequencies and creates the premises for simultaneous data parallel SW based processing without hardware replication or delay overhead. In this paper we leverage this SW property by introducing a novel computation paradigm, which allows for the parallel processing of n-bit input data vectors on the same basic SW based logic gate. Subsequently, to demonstrate the proposed concept, we present 8-bit parallel 3-input Majority gate implementation and validate it by means of Object Oriented MicroMagnetic Framework (OOMMF) simulations. To evaluate the potential benefit of our proposal we compare the 8-bit data parallel gate with equivalent scalar SW gate based implementation. Our evaluation indicates that 8-bit data 3-input Majority gate implementation requires 4.16x less area than the scalar SW gate based equivalent counterpart while preserving the same delay and energy consumption figures.

Original languageEnglish
Title of host publication2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)
Subtitle of host publicationProceedings
EditorsGiorgio Di Natale, Cristiana Bolchini, Elena-Ioana Vatajelu
PublisherIEEE
Pages642-645
Number of pages4
ISBN (Electronic)978-3-9819263-4-7
ISBN (Print)978-1-7281-4468-9
DOIs
Publication statusPublished - 2020
Event2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020 - Grenoble, France
Duration: 9 Mar 202013 Mar 2020

Conference

Conference2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
CountryFrance
CityGrenoble
Period9/03/2013/03/20
OtherBecause of the COVID-19 outbreak, the conference took place in a virtual environment, in April and May 2020.

Keywords

  • Area
  • Data Parallelism
  • Delay
  • Energy
  • Logic Gate
  • Multi-frequency
  • Spin-wave Computing
  • Spin-waves

Fingerprint Dive into the research topics of 'N-bit Data Parallel Spin Wave Logic Gate'. Together they form a unique fingerprint.

  • Cite this

    Mahmoud, A. N. N., Vanderveken, F., Ciubotaru, F., Adelmann, C., Cotofana, S., & Hamdioui, S. (2020). N-bit Data Parallel Spin Wave Logic Gate. In G. Di Natale, C. Bolchini, & E-I. Vatajelu (Eds.), 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE): Proceedings (pp. 642-645). [9116368] IEEE. https://doi.org/10.23919/DATE48585.2020.9116368