nfluence of layout design and on-wafer heatspreaders on the thermal behavior of fully-isolated bipolar transistors: part II-dynamic analysis

S Russo; L La Spina; V d' Alessandro; N Rinaldi; LK Nanver

doi:10.1016/j.sse.2010.03.016

nfluence of layout design and on-wafer heatspreaders on the thermal behavior of fully-isolated bipolar transistors: part II-dynamic analysis

S Russo, L La Spina, V d' Alessandro, N Rinaldi, LK Nanver

Research output: Contribution to journal › Article › Scientific › peer-review

Original language	English
Pages (from-to)	754-762
Number of pages	9
Journal	Solid-State Electronics
Volume	54
Issue number	8
DOIs	https://doi.org/10.1016/j.sse.2010.03.016
Publication status	Published - 2010

Keywords

CWTS JFIS < 0.75

Access to Document

10.1016/j.sse.2010.03.016

Cite this

@article{a80b666cc1a6404e8965809d6fafa812,

title = "nfluence of layout design and on-wafer heatspreaders on the thermal behavior of fully-isolated bipolar transistors: part II-dynamic analysis",

keywords = "CWTS JFIS < 0.75",

author = "S Russo and {La Spina}, L and {d' Alessandro}, V and N Rinaldi and LK Nanver",

year = "2010",

doi = "10.1016/j.sse.2010.03.016",

language = "English",

volume = "54",

pages = "754--762",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Elsevier",

number = "8",

}

TY - JOUR

T1 - nfluence of layout design and on-wafer heatspreaders on the thermal behavior of fully-isolated bipolar transistors: part II-dynamic analysis

AU - Russo, S

AU - La Spina, L

AU - d' Alessandro, V

AU - Rinaldi, N

AU - Nanver, LK

PY - 2010

Y1 - 2010

KW - CWTS JFIS < 0.75

U2 - 10.1016/j.sse.2010.03.016

DO - 10.1016/j.sse.2010.03.016

M3 - Article

SN - 0038-1101

VL - 54

SP - 754

EP - 762

JO - Solid-State Electronics

JF - Solid-State Electronics

IS - 8

ER -