Emerging device technologies such as Resistive RAMs (RRAMs) are under investigation by many researchers and semiconductor companies; not only to realize e.g., embedded non-volatile memories, but also to enable energy-efficient computing making use of new data processing paradigms such as computation-in-memory. However, such devices suffer from various non-idealities and reliability failure mechanisms (e.g., variability, endurance, and retention); these negatively impact the memory robustness and the computation accuracy. This paper discusses the non-idealities and reliability failure mechanisms for RRAM devices, provides an overview on the most popular ones. In addition, it reports detailed anlysis of some of these based on data measurements. Finally, it presents two different mitigation schemes for RRAM based accelerators; one is based on RRAM non-ideality aware quantization and conductance control for neural network accuracy enhancement while the second is based on reliability-aware biased training technique.
|Title of host publication
|Proceedings of the 2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)
|Number of pages
|Published - 2023
|2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC) - Dubai, United Arab Emirates
Duration: 16 Oct 2023 → 18 Oct 2023
Conference number: 31st
|2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC)
|United Arab Emirates
|16/10/23 → 18/10/23
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- neural network
- in-memory computing