Optimal-depth circuits for prefex computation and addition

CH Yeh, EA Varvarigos, B Parhami

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

Original languageUndefined/Unknown
Title of host publicationProceedings
Editors MB Matthews
Place of PublicationPiscataway
PublisherIEEE Society
Pages1349-1353
Number of pages5
ISBN (Print)0-7803-6514-3
Publication statusPublished - 2000
Event34th Asilomar Conference on Signals, Systems and Computers, Pacific Grove - Piscataway
Duration: 29 Oct 20001 Nov 2000

Publication series

Name
PublisherIEEE

Conference

Conference34th Asilomar Conference on Signals, Systems and Computers, Pacific Grove
Period29/10/001/11/00

Keywords

  • ZX Int.klas.verslagjaar < 2002

Cite this

Yeh, CH., Varvarigos, EA., & Parhami, B. (2000). Optimal-depth circuits for prefex computation and addition. In MB Matthews (Ed.), Proceedings (pp. 1349-1353). IEEE Society.