Optimizing Memory BIST Address Generator Implementations

AJ van de Goor, H Kukner, S Hamdioui

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

7 Citations (Scopus)
Original languageEnglish
Title of host publicationProceedings 2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era
EditorsS Bernard, C Efstathiou
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Society
Pages1-6
Number of pages6
ISBN (Print)978-1-61284-899-0
DOIs
Publication statusPublished - 2011
EventDTIS 2011, Athens, Greece - Piscataway, NJ, USA
Duration: 6 Apr 20118 Apr 2011

Publication series

Name
PublisherIEEE

Conference

ConferenceDTIS 2011, Athens, Greece
Period6/04/118/04/11

Keywords

  • Conf.proc. > 3 pag

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