Output Impedance Modelling and Sensitivity Study of Grid-Feeding Inverters with Dual Current Control

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Abstract

In this paper, the output impedance of a three-phase inverter based on a dual current control (also called double synchronous reference frame current control) is modelled, which includes: the current loop gain, the control delay, and the Phase-
Locked Loop (PLL). The impact of these parameters on the impedance is then analysed by a sensitivity study. The model is derived using transfer matrices and complex transfer functions, and it results in a compact impedance formulation that can be used in harmonic small-signal stability studies and system-wide steady-state harmonic calculations.
Original languageEnglish
Title of host publicationIECON 2019 - 45th Annual Conference of the IEEE Industrial Electronics Society
Place of PublicationPiscataway
PublisherIEEE
Pages4007-4012
Number of pages6
ISBN (Electronic)978-1-7281-4878-6
ISBN (Print)978-1-7281-4879-3
DOIs
Publication statusPublished - 2019
EventIECON 2019: IEEE 45th Annual Conference of the Industrial Electronics Society - Lisbon, Portugal
Duration: 14 Oct 201917 Oct 2019
Conference number: 45th

Conference

ConferenceIECON 2019
CountryPortugal
CityLisbon
Period14/10/1917/10/19

Keywords

  • inverter
  • dual current control
  • double synchronous reference frame
  • small-signal model
  • impedance

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