Abstract
This article proposes a novel eight-phase self-bias-flip piezoelectric energy harvesting interface with charge recycling and reusing (SBFRR) and a switched-piezoelectric energy harvester (PEH) dc–dc (SPDC) converter. The proposed scheme innovatively utilizes the inherent capacitors ( CP ) of four PEHs as energy sources, flying capacitors, and flipping capacitors for time-sharing reuse to achieve both a high-voltage flipping and dc–dc conversion efficiency, while avoiding the use of extra energy reservoirs. The design is fully integrated and fabricated in standard 0.18- μ m CMOS. Measurement result demonstrates that the voltage flipping efficiency of up to 80% is achieved. Compared with the ideal full-bridge rectifier (FBR), the measured maximum output power improving rate (MOPIR) can be increased to 4.88 × . In addition, with the four CP serving as flying capacitors to achieve SPDC conversion for maximum power point track (MPPT), an MOPIR of > 3.5 × can be maintained with a PEH input voltage from 0.78 to 4.9 V.
| Original language | English |
|---|---|
| Pages (from-to) | 2248-2259 |
| Number of pages | 12 |
| Journal | IEEE Journal of Solid-State Circuits |
| Volume | 59 |
| Issue number | 7 |
| DOIs | |
| Publication status | Published - 2023 |
Bibliographical note
Green Open Access added to TU Delft Institutional Repository ‘You share, we take care!’ – Taverne project https://www.openaccess.nl/en/you-share-we-take-careOtherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
Keywords
- Energy harvesting
- flipping efficiency
- fully integrated
- maximum output power improving rate (MOPIR)
- maximum power point track (MPPT)
- multi-input
- piezoelectric
- self-bias-flip
- switched-piezoelectric energy harvester (PEH) dc–dc (SPDC)
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