Post-bond interconnect test and diagnosis for 3-D memory stacked on logic

Research output: Contribution to journalArticleScientificpeer-review

10 Citations (Scopus)
Original languageEnglish
Pages (from-to)1860-1872
Number of pages13
JournalIEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems
Volume34
Issue number11
DOIs
Publication statusPublished - 2015

Bibliographical note

Harvest
Date of publication 12-5-2015

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