Abstract
The task of the system architect is to take the correct early decisions despite the uncertainties.
Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip.
Power-Aware Architecting provides a systematic way to support the system architect in this job. Therefore, an iterative system-level design approach is defined where iterations are based on fast and accurate estimations or predictions of area, performance and energy consumption. This method is illustrated with a concrete real life example of multi-carrier communication. This book is the result of a Ph.D. thesis, which is part of the UbiCom project at Delft University of Technology. I strongly recommend it to any engineer, expert or specialist, who is interested in designing embedded systems-on-a-chip.
Original language | English |
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Place of Publication | Dordrecht |
Publisher | Springer |
Number of pages | 118 |
ISBN (Electronic) | 978-1-4020-6420-3 |
ISBN (Print) | 978-1-4020-6419-7, 978-90-481-7635-9 |
DOIs | |
Publication status | Published - 2007 |
Publication series
Name | |
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Publisher | Springer |
Keywords
- Circuits and Suystems