Qubit frequency targeting in scalable superconducting quantum processors

N. Muthusubramanian*

*Corresponding author for this work

Research output: ThesisDissertation (TU Delft)

56 Downloads (Pure)

Abstract

Superconducting qubits are a leading platform holding potential for realization of fault-tolerant universal quantum computation. However, experimental demonstration of quantum fault tolerance may require scaling up to hundreds of physical qubits (Chapter 1).

The non-linearity of superconducting qubits emerges from current-phase relation in superconducting tunnel junctions, better known as Josephson junctions (Chapter 2). The transmon is a special case of the charge qubit with a large parallel shunt capacitance which results in suppression of charge noise sensitivity at the cost of reduced anharmonicity. The resonance frequency of a transmon depends on the charging energy contributed by the total capacitance of the circuit and the non-linear inductive energy of a Josephson junction. This inductance is in turn directly proportional to the room-temperature conductance of the tunnel junctions, determined by the junction area and thickness of the tunnel barrier. The manipulation of superconducting artificial atoms by strongly coupling to microwave photons is achieved using circuit quantum electrodynamics. In planar superconducting circuits, on­-chip transmission lines based on coplanar waveguide geometry is routinely employed to manipulate and readout the qubit states (Chapter 3).

The QuSurf architecture for a full-stack quantum computer features an extensible surface code comprising flux-tunable qubits with four-port connectivity to nearest neighbours. The first distance-3 logical qubit requires a 2D lattice of 17 qubits to perform quantum error correction. At the hardware level, we concurrently pursue a short-term low-overhead and a long-term high-overhead strategy with lateral and vertical input/output signal routing respectively (Chapter 3). The usefulness of a superconducting quantum processor depends on three main fabrication metrics, the physical yield of individual components, how well it matches the chip design specifications and its susceptibility to environmentally-induced decoherence (Chapter 4). Due to the nanometer-scale of Josephson junctions, it is particularly challenging to reliably target a desired qubit frequency within a margin of 50 MHz.

This thesis outlines the current fabrication bottlenecks which limit scalability with a focus on increasing the precision of qubit frequency targeting. The addition of through-silicon vias for vertical routing of signals and increasing the density of on-chip components add layers of complexity to this problem, which necessitates testing two variants of Josephson junctions with subtle differences in the fabrication process and its geometry. The primary objective is to systematically identify and quantify the sources of deviation affecting fabrication of the two Josephson junctions variants. To determine the causes of spread in Josephson junctions aside from intrinsic variations in the tunnel barrier, room-temperature conductance measurements are compared for thousands of test junction structures fabricated at waferscale. (Chapter 5). We also develop customized fabrication tools and techniques to achieve selective or global tailoring of qubit frequencies (Chapter 6). The thesis concludes with a summary on the factors identified in this work which impacts qubit frequency targeting, a reflection on the limitations of this work and an outlook on specific aspects of scalability of superconducting qubits in the near future (Chapter 7).
Original languageEnglish
QualificationDoctor of Philosophy
Awarding Institution
  • Delft University of Technology
Supervisors/Advisors
  • di Carlo, L., Supervisor
  • Kuipers, L., Supervisor
Award date15 Nov 2024
Print ISBNs 978-94-6366-969-6
DOIs
Publication statusPublished - 2024

Keywords

  • Josephson junction
  • Superconducting qubit
  • Qubit
  • Fabrication
  • Frequency
  • Scalability

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