Re-enactment simulation for buffer size optimization in semiconductor back-end production

Jelle Adan, Stephan Sneijders, Alp Akcay, Ivo J.B.F. Adan

Research output: Chapter in Book/Conference proceedings/Edited volumeConference contributionScientificpeer-review

1 Citation (Scopus)
40 Downloads (Pure)

Abstract

In this work, we propose a re-enactment simulation-based optimization method to determine the minimal total buffer capacity in an assembly line required to meet a target throughput. A distinguishing feature is the use of real-time event traces, in a fast fluid flow simulation model. Employing real-time event traces avoids the necessity to make restrictive modeling assumptions. The fluid simulation is combined with a multi start search algorithm. To demonstrate its effectiveness, the method is applied to a real-world use case in lead frame based semiconductor back-end manufacturing. This use case considers an assembly line consisting of six machines, for which the proposed method determines optimal buffer size configurations within several minutes of computational time.

Original languageEnglish
Title of host publicationProceedings 2018 Winter Simulation Conference (WSC 2018)
Subtitle of host publicationSimulation for a Noble Cause
EditorsBjörn Johansson, Sanjay Jain
Place of PublicationPiscataway, NJ, USA
PublisherIEEE
Pages3432-3440
ISBN (Electronic)978-1-5386-6572-5
ISBN (Print)978-1-5386-6573-2
DOIs
Publication statusPublished - 2018
EventWSC 2018: Winter Simulation Conference 2018: Simulation for a Noble Cause - Gothenburg, Sweden
Duration: 9 Dec 201812 Dec 2018
http://meetings2.informs.org/wordpress/wsc2018/

Conference

ConferenceWSC 2018: Winter Simulation Conference 2018
Abbreviated titleWSC 2018
CountrySweden
CityGothenburg
Period9/12/1812/12/18
Internet address

Bibliographical note

Accepted Author Manuscript

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