Review of Packaging Schemes for Power Module

Fengze Hou, Wenbo Wang, Liqiang Cao, Jun Li, Meiying Su, Tingyu Lin, Guoqi Zhang, Braham Ferreira*

*Corresponding author for this work

Research output: Contribution to journalReview articlepeer-review

83 Citations (Scopus)
1714 Downloads (Pure)


SiC devices are promising for outperforming Si counterparts in high-frequency applications due to its superior material properties. Conventional wirebonded packaging scheme has been one of the most preferred package structures for power modules. However, the technique limits the performance of a SiC power module due to parasitic inductance and heat dissipation issues that are inherent with aluminum wires. In this article, low parasitic inductance and high-efficient cooling interconnection techniques for Si power modules, which are the foundation of packaging methods of SiC ones, are reviewed first. Then, attempts on developing packaging techniques for SiC power modules are thoroughly overviewed. Finally, scientific challenges in the packaging of SiC power module are summarized.

Original languageEnglish
Article number8869891
Pages (from-to)223-238
Number of pages16
JournalIEEE Journal of Emerging and Selected Topics in Power Electronics
Issue number1
Publication statusPublished - 1 Mar 2020


  • High-efficient cooling
  • low parasitic inductance
  • packaging schemes
  • scientific challenges
  • SiC power module


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