The domain of space avionic systems is changing extremely rapidly, compared to other technical domains in space-faring industry, under the pressure of an intense competition, the continuous emergence of new markets and players, the need for cost reduction, as well as an increased obsolescence rate of components and processes. This rapidly changing landscape is as well opening a large amount of opportunities for the space avionic systems: the new high-performance processors architectures and silicon processes, which offer the possibility to integrate different functions until now implemented on several boards either in a single chip (SoC), or in application-specific standard products (ASSP) or in new large FPGAs are allowing multi-fold gains in performances and miniaturization for electronic systems. Another example are digital sensor buses, already heavily used in automotive and embedded applications and now also introduced in space systems to tackle mass, power reduction, increase of accuracy and increase of testability. Reliability and availability constraints remain the main driving requirements for established space hardware manufacturers. Most of the connected world infrastructure, as well as critical services in commercial and governmental domains are still highly dependent from space assets, and avionics-related failures may account for a large part of the system's downtime. In this context, the emergence of space systems based on only Commercial-Off-The-Shelf (COTS) (like Cubesats) is not necessarily helping, since in order to cut costs the rigorous test and quality assurance processes applied to bigger satellite are waived underestimating how unforgiving space environment can be for electronics.
|Title of host publication||Dependable Multicore Architectures at Nanoscale|
|Editors||M. Ottavi, D. Gizopoulos, S. Pontarelli|
|Number of pages||29|
|Publication status||Published - 28 Aug 2017|