Abstract
Computation-In Memory (CIM) using RRAM crossbar array is a promising solution to realize energy-efficient neuromorphic hardware, such as Binary Neural Networks (BNNs). However, RRAM faults restrict the applicability of CIM for BNN implementation. To address this issue, we propose a fault tolerance framework to mitigate the impact of RRAM faults on the accuracy of CIM-based BNN hardware. Evaluation results using MNIST, Fashion-MNIST and CIFAR-10 datasets demonstrate that the proposed framework outperforms the related works as it restores more than 99% of the RRAM fault induced accuracy reduction with relatively less overhead.
Original language | English |
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Title of host publication | Proceedings of the 2022 IEEE European Test Symposium (ETS) |
Place of Publication | Danvers |
Publisher | IEEE |
Pages | 1-2 |
Number of pages | 2 |
ISBN (Electronic) | 978-1-6654-6706-3 |
ISBN (Print) | 978-1-6654-6707-0 |
DOIs | |
Publication status | Published - 2022 |
Event | 2022 IEEE European Test Symposium (ETS) - Barcelona, Spain Duration: 23 May 2022 → 27 May 2022 |
Conference
Conference | 2022 IEEE European Test Symposium (ETS) |
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Country/Territory | Spain |
City | Barcelona |
Period | 23/05/22 → 27/05/22 |
Bibliographical note
Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-careOtherwise as indicated in the copyright section: the publisher is the copyright holder of this work and the author uses the Dutch legislation to make this work public.
Keywords
- CIM
- fault tolerance
- RRAM
- BNN