Single-grain Si TFTs with ECR-PECVD gate SiO2

R Ishihara, Y Hiroshima, D Abe, BD van Dijk, PC van der Wilt, S Higashi, S Inoue, T Shimoda, JW Metselaar, CIM Beenakker

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33 Citations (Scopus)


High-performance Si thin-film transistors (TFTs) are fabricated inside a single, location-controlled grain with gate SiO/sub 2/ deposited by electron cyclotron resonance plasma enhanced chemical vapor deposition (ECR-PECVD). The position of the large grains is controlled by /spl mu/-Czochralski (grain-filter) process with excimer-laser crystallization. Owing to the low interface trap density of ECR-PECVD SiO/sub 2/ the single-grain Si TFTs showed a smaller subthreshold swing of 0.45 V/decade, in addition to a higher field-effect mobility for electrons of 460 cm/sup 2//Vs than that with low-pressure chemical-vapor deposited (LPCVD) SiO/sub 2/.
Original languageUndefined/Unknown
Pages (from-to)500-502
Number of pages3
JournalIEEE Transactions on Electron Devices
Issue number3
Publication statusPublished - 2004


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