TY - JOUR
T1 - Skeleton-based Synthesis Flow for Computation-In-Memory Architectures
AU - Yu, Jintao
AU - Nane, Razvan
AU - Ashraf, Imran
AU - Taouil, Mottaqiallah
AU - Hamdioui, Said
AU - Corporaal, Henk
AU - Bertels, Koen
PY - 2020/6/7
Y1 - 2020/6/7
N2 - Memristor-based Computation-in-Memory (CIM) is one of the emerging architectures for next-generation Big Data problems. Its design requires a radically new synthesis flow as the memristor is a passive device that uses resistances to encode its logic values. This article proposes a synthesis flow for mapping parallel applications on memristor-based CIM architecture. First, it employs solution templates that contain scheduling, placement, and routing information to map multiple algorithms with similar data flow graphs to the memristor crossbar; this template is named skeleton. Complex algorithms that do not fit a single skeleton can be solved by nested skeletons. Therefore, this approach can be applied to a wide range of applications while using a limited number of skeletons only. Second, it further improves the design when spatial and temporal patterns exist in input data. To accelerate simulation of generated SystemC models, we integrate MPI in skeletons. The synthesis flow and its additional features are verified with multiple applications, and the results are compared against a multicore platform. These experiments demonstrate the feasibility and the potential of this approach.
AB - Memristor-based Computation-in-Memory (CIM) is one of the emerging architectures for next-generation Big Data problems. Its design requires a radically new synthesis flow as the memristor is a passive device that uses resistances to encode its logic values. This article proposes a synthesis flow for mapping parallel applications on memristor-based CIM architecture. First, it employs solution templates that contain scheduling, placement, and routing information to map multiple algorithms with similar data flow graphs to the memristor crossbar; this template is named skeleton. Complex algorithms that do not fit a single skeleton can be solved by nested skeletons. Therefore, this approach can be applied to a wide range of applications while using a limited number of skeletons only. Second, it further improves the design when spatial and temporal patterns exist in input data. To accelerate simulation of generated SystemC models, we integrate MPI in skeletons. The synthesis flow and its additional features are verified with multiple applications, and the results are compared against a multicore platform. These experiments demonstrate the feasibility and the potential of this approach.
KW - Adders
KW - Algorithm design and analysis
KW - algorithmic skeleton
KW - Common Information Model (computing)
KW - Hardware
KW - Memristor
KW - Memristors
KW - Routing
KW - Skeleton
KW - SystemC
UR - http://www.scopus.com/inward/record.url?scp=85032450099&partnerID=8YFLogxK
U2 - 10.1109/TETC.2017.2760927
DO - 10.1109/TETC.2017.2760927
M3 - Article
AN - SCOPUS:85032450099
SN - 2168-6750
VL - 8
SP - 545
EP - 558
JO - IEEE Transactions on Emerging Topics in Computing
JF - IEEE Transactions on Emerging Topics in Computing
IS - 2
ER -