Skeleton-based Synthesis Flow for Computation-In-Memory Architectures

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Abstract

Memristor-based Computation-in-Memory (CIM) is one of the emerging architectures for next-generation Big Data problems. Its design requires a radically new synthesis flow as the memristor is a passive device that uses resistances to encode its logic values. This article proposes a synthesis flow for mapping parallel applications on memristor-based CIM architecture. First, it employs solution templates that contain scheduling, placement, and routing information to map multiple algorithms with similar data flow graphs to the memristor crossbar; this template is named skeleton. Complex algorithms that do not fit a single skeleton can be solved by nested skeletons. Therefore, this approach can be applied to a wide range of applications while using a limited number of skeletons only. Second, it further improves the design when spatial and temporal patterns exist in input data. To accelerate simulation of generated SystemC models, we integrate MPI in skeletons. The synthesis flow and its additional features are verified with multiple applications, and the results are compared against a multicore platform. These experiments demonstrate the feasibility and the potential of this approach.

Original languageEnglish
Pages (from-to)545-558
Number of pages14
JournalIEEE Transactions on Emerging Topics in Computing
Volume8
Issue number2
DOIs
Publication statusPublished - 7 Jun 2020

Keywords

  • Adders
  • Algorithm design and analysis
  • algorithmic skeleton
  • Common Information Model (computing)
  • Hardware
  • Memristor
  • Memristors
  • Routing
  • Skeleton
  • SystemC

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